Parallel-Plate Capacitor

Ideal parallel plates with a homogeneous, linear dielectric filling the gap: C = ε₀εᵣA/d. Choose fixed voltage or fixed free charge. With voltage V = Vtop − Vbottom, Qtop = CV, E = V/d, σfree = Q/A, stored energy = QV/2 and energy density = εE²/2. Negative voltage reverses plate signs and field direction; zero removes both. The bottom plate has the opposite free charge.

At fixed voltage, increasing εᵣ increases capacitance, free charge and stored energy; E stays constant. At fixed charge, increasing εᵣ decreases voltage, field and stored energy. Geometry changes are recalculated immediately. The drawing is schematic; its dimensions and arrow count are not to scale.

Fringing is neglected. A is the overlap area; the gap should be small compared with the plate dimensions. For roughly square plates, d/√A > 0.1 triggers a qualitative warning, not an accuracy guarantee. No dielectric breakdown, leakage, heating, frequency dependence or material rating is calculated. Numeric input limits are arithmetic bounds, not operating recommendations.

Area is in m², gap in mm, charge input in nC, voltage in V. The output uses pF, nC and µJ with scientific notation when needed. ε₀ = 8.8541878188×10⁻¹² F/m from NIST CODATA 2022. Inputs and both quantity drafts survive navigation and reload; previous four-slider settings are migrated.